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AIC Seminar Series

Formal Behavior-Driven Machine Learning to Simulate Digital Circuits

John ByrnesArtificial Intelligence Center, SRI International

Date:  Thursday, October 21st 2021 at 4:00pm

Location:  https://sri.zoomgov.com/j/16028867898  (Directions)

   Abstract

Digital circuit simulators read Verilog or other circuit specification languages and provide detailed simulation of every bit flip in every register on every clock cycle, resulting in very long runtimes for testing complex systems. It is often the case that a developer needs detailed testing of a new device in the context of a large system composed mostly of pre-existing devices. In this case, simulation of the pre-existing devices can be done much more quickly on neural networks that do not need to operate at every clock cycle. Additionally, much of the testing that needs to be done will tolerate some inaccuracy in simulation, allowing trade-offs between speed and accuracy. Under the DARPA Ditto AIE, we are applying DASL to combine small amounts of data from circuit simulators with formal behavioral knowledge such as System Verilog Assertions in order to train neural networks to simulate digital circuits. This talk will be an informal discussion of the overall approach and some initial results.

   Bio for John Byrnes

  • Automated Deductive Reasoning
  • Text Analytics
  • Bayesian Inference

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