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AIC Seminar Series

Fast, Good, and (Reasonably) Cheap: Synthesizing Planners from Specifications

Srinivas NedunuriUniversity of Texas at Austin and Kestrel Institute[Home Page]

Notice:  Hosted by Richard Waldinger

Date:  2011-08-30 at 16:00

Location:  EJ291 (SRI E building)  (Directions)

   Abstract

The construction of fast planners that produce good quality plans remains a challenging problem. On the one hand there are fully automated planners but their scalability remains an issue. On the other hand manually constructed planners are extremely fast, but their construction is labor-intensive and specific to the problem domain. In this talk we describe a semi-automated process for synthesizing high quality classical planners from formal specifications. The goal is to produce planners that retain the advantages of both the automatic and manual approaches. We utilize a 2-stage architecture called Planning by Rewriting. In the first stage a satisficing planner attempts to very quickly find a feasible plan. I describe how the satisficing planner can be constructed by deriving dominance relations among sibling branches. In the second stage, the plan is optimized by the application of rewrite rules. I show how the rewrite rules can be automatically learned from small examples, again using dominance relations. The learned rules are compact and do not rely on state information so they are fast to match.

   Bio for Srinivas Nedunuri

Srinivas is a final year PhD student at the University of Texas at Austin, working at the Kestrel Institute for the summer. His research interests are in the synthesis of efficient algorithms from formal specifications. His main focus has been on search algorithms, particularly for planning and scheduling. He has over 10 years experience in the tech industry having worked for both large and small companies.

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